FIG. 1 is a simplified block diagram showing a signaling path of a cellular telephone 10. An antenna 12 is coupled to a radio frequency (RF) unit 14. The antenna 12 both receives and transmits RF-signals for accomplishing a telephone connection. A baseband signaling unit (BBS) 16 is interposed between the RF unit 14 and a controlling processor (MCU) 18, typically implemented as a microprocessor-based controller (microcontroller). The baseband signaling unit 16 outputs an analog signal (TX) to the RF unit 14, where TX is used to modulate a suitable RF carrier. The BBS 16 receives an analog signal (RX) that represents a demodulated signal that is received by the antenna 12. Communication between the BBS 16 and the MCU 18 is by digital techniques, and includes an Interrupt signal line (INT), an m-bit address bus, and an n-bit data bus. In operation, the BBS 16 and the MCU 18 implement a selected signaling protocol when transmitting and receiving a telephone communication.
A conventional AMPS signaling protocol and format is described in the EIA Interim Standard IS-3-B, "Cellular System Mobile Station-Land Station Compatibility Specification" (July, 1984), and in The Bell System Technical Journal, vol 58, no. 1, "Advanced Mobile Phone Service" (January, 1979). The AMPS signaling protocol is also specified for use in the EIA/TIA Interim Standard IS-54-B, "Cellular System Dual-Mode Mobile Station-Base Station Compatibility Standard (April, 1992). A TACS signaling protocol is similar to the AMPS, differing primarily in the bit rate (AMPS 10 kbit/s, TACS 8 kbit/s).
In the AMPS protocol, and for a Forward Control Channel (FOCC, or FCC), the signaling is a continuous bit stream from a base station (land station) to a mobile station. The FOCC signaling message (data frame) is 463 bits long, and effectively contains one information word of 28 bits. A data frame actually contains two data streams designated A and B. However, only one of these streams is required by any particular phone, and selection between the two data streams is determined based on the phone's internally stored number. The 28 data bits-(data word) are further encoded with a Bose-Chaudhuri-Hocquenghem (BCH) cyclic code that provides an encoded word of 40 bits (28 bits of data and 12 bits of parity). In the frame this 40 bit string is repeated five times (repeats R1-R5), to provide redundancy against radio channel distortion (fades and impulsive noise). The repeats R1-R5 are collected, 3/5 majority voted, and BCH-decoded, thereby providing error correction and error detection. BCH-decoding can typically correct a one bit error, and can also indicate if the decoded word is faultless (contains no bit errors). The BCH code has a Hamming distance of four and can thus detect up to four errors, if error correction is not used.
Other AMPS/TACS signaling protocols; i.e. a Reverse Control Channel (RECC or RCC) signaling protocol from mobile station to base station, Voice Channel (FVC, RVC) signaling protocols, Voice Channel Signaling Tone (ST), and Voice Channel Supervisory Audio Tone (SAT) are not relevant to this invention, and are not discussed further.
One known implementation of a FOCC signaling receiver provides appropriate filtering of the received signal, data recovery, collecting repeats R1-R5, 3/5 majority voting, and BCH-error correction. After being so processed, the data is provided to the microcontroller. By example, this implementation is found in a circuit known as a UMA1000T DPROC, which is available from Philips/Signetics.
Another example, shown in FIG. 2, has substantially the same functional blocks; i.e., filter, DPLL, Manchester-decoder, 3/5 majority voting and BCH error-correction. In this implementation a Control register (CREG) 20 includes registers for controlling the circuit operation. Internal clocks are generated from an input clock in block CLOCKDIV 22. The input node (DI) provides a received data signal to a low-pass filter (AAFIL) 24. The data is connected through a comparator (DATACOMP) 26 to a Manchester decoder (MANDEC) 28, which decodes the Manchester encoded data to a NRZ (None Return to Zero) format.
The signaling circuit is bit synchronized to the received data with a digital phase locked loop (DPLL) 30, and is frame synchronized with a Word Synchronization (eleven bits long WS-pattern) detection logic block (RECBUF) 32. The bandwidth of the DPLL 30 is controlled to obtain optimum performance under different operating conditions. By example, the DPLL 30 can be set to a wider bandwidth for fast bit synchronization, for example when going to a control channel for the first time, or in the case where synchronization is lost. In this case the block RECBUF 32 searches for the Word Synchronization pattern (typically called a "Hunt Mode").
The serial data from the MANDEC 28 is 3/5 majority voted (repeats R1-R5) in block VOTE 34, BCH decoded in block BCH 36, bit error corrected by block CORR 38, and shifted into a receiver register (RREG) 40. A final data word comprises 28 bits. Four status bits are added to RREG 40 to make up a 32 bit register, which is read by the microcontroller 18 in 8-bit bytes, via status multiplexer (SMUX) 42.
A receiver timing block (RECTIM) 44 extracts the data from received frames on the control channel and generates data transfer interrupts (WFLAG). RECTIM 44 also separates the time-multiplexed data streams (channel A and B) and Busy/Idle-information (XBOI) on the control channel. RECTIM 44 maintains bit and word synchronization during different frames and passes the synchronization status (SFLAG) forward to the status register of SMUX 42 and MCU 18. A repeat flag (RFLAG) can be used to indicate the end of each received repeat of the data word.
In accordance with theAMPS FOCC signaling format, and the signaling circuit receiver block diagram of FIG. 2, the following operations are performed. Initialization involves setting the FOCC channel, selecting the A or B bit stream, and initiating the "Hunt Mode". Reception is started when the first Word Synchronization (WS) pattern is found by RECBUF 32. The DPLL 30 thereafter maintains bit synchronization, and VOTE 34 collects all five repeats (R1-R5) of the data word. Block RECTIM 44 controls receiver timing and frame control. For example, RECTIM 44 controls the timing of VOTE 34 as to when to collect repeat data and when not to collect the data. Block VOTE 34 performs the 3/5 majority vote of the collected repeats, and blocks BCH 36 and CORR 38 then BCH-decode and correct the voted data, respectively. The result is saved in block RREG 40. Status flag WFLAG is set to interrupt the processor 18 in order to indicate that received data is processed and is ready to be read from the RREG 40.
In that the FOCC signaling protocol is a continuous 463 bit long frame, and in that the frame is continuously repeated, one can clearly see that the mobile phone receiver must continuously receive the FOCC bit stream. Thus, the receiver circuitry is continuously operating, and is therefore continuously consuming current.
The reduction of this current consumption is an important goal in a radiotelephone, particularly in hand-portable phones. By default, the transmitter is turned off when the phone is not in conversation mode, so only the receiver is consuming power. This mode is called stand-by mode, or a normal receiving mode in this context.
One method to reduce the receiver power consumption is described by Harte in U.S. Pat. No. 5,224,152, "Power Saving Arrangement and Method in Portable Cellular Telephone System", issued Jun. 29, 1993 In this method the receiver operates discontinuously, and power is saved by decoupling the power supply from some components for certain periods of time. However, certain aspects of this approach lead to a less than optimum solution to reducing receiver power. For example, received words are BCH-decoded by a microprocessor, which consumes a considerable amount of power. Also, the disclosure of Harte does not specify how to implement an optimal system solution, i.e. from which circuits is the power removed, how, and how quickly these circuits can be recovered/initialized when power is switched on again. Similar problems exist for the RF circuitry.
A further drawback to this approach becomes apparent if the parity of BCH-decoded first word is not correct. In this case the next word is received and BCH-decoded. As a result, in a worst case all five individual repeats of the word in the frame must be received and BCH-decoded by the microprocessor, thereby consuming considerable power. Another perceived drawback to this approach is that power can be saved only in the case that the message is intended for another mobile phone. For instance, if there are only a few messages to other mobile phones, the power save mode can be entered only occasionally and, thus, does not provide a significant benefit.
Another method to reduce the power consumption is described by Auchter in U.S. Pat. No. 5,175,874 "Radiotelephone Message Processing for Low Power Operation", issued Dec. 29, 1992. In this method the receiver operates discontinuously, but again certain aspects lead to a less than optimum solution to reducing power consumption. By example, at least two data words are received. As a result, the earliest possible moment to shut the receiver off is after the second (or later) repeat of the data word. Additionally, the two data words are compared to each other. The comparison operation itself consumes power, and also causes an additional delay before the receiver can be shut off.
It is noted that with mobile telephones the quality and strength of a received signal can vary within a wide range, depending on field strength, fades, disturbances, etc. The use of discontinuous receiving, however, is best employed under optimum receiving conditions.
For example, if the receiver is switched off the next frame is captured only if the next Word Sync pattern is detected. However, if there is one or more bit error(s) in the Word Sync pattern the next frame may be lost, thereby increasing a Message Error Rate.
Another technique to reduce power consumption is described in U.S. Pat. No. 4,777,655, wherein the power saving is limited to the frequency divider portion of receiver. Moreover, as one of the data stream groups (A or B) is being received, a prescaler must be turned on during the other one of the data stream groups to avoid problems during an initial unstable operation of a PLL synthesizer. Furthermore, all data repeats of a selected data stream group (A or B) are received, i.e. the receiver of the phone is continuously operating, and only the frequency divider portion can be set to the power save state.